The forthcoming Design Automation Conference (DAC) will be a prime venue to learn more about the varied uses of hardware emulation.
Source: EETimes
As much as I would like to take credit for the title of this viewpoint, I must step back and give credit to D.A. Davidson, a financial analyst firm that follows the Electronic Design Automation (EDA) industry.
Credit aside, after lying dormant and lethargic for one long decade, the emulation market is sizzling and “Red Hot.” The Gary Smith EDA website must agree because it included Cadence Design Systems and Mentor Graphics in its annual What to See@DAC 2014 list in the emulation category. Both are full-line EDA suppliers, yet neither was listed for anything else.
Why this intensifying interest in hardware emulation? It’s because emulation is the only viable solution to perform the critical task of weeding out the most difficult-to-find bugs in the latest breed of highly complex embedded system-on-chip (SoC) designs. Only hardware emulation can trace bugs across the boundary of the embedded software and the underlining hardware.
Historically, hardware emulation was used to debug the hardware of the largest designs, such as those found in microprocessor and graphics chips. That is to say, only a few large companies with big budgets could afford the high cost of ownership of what was an expensive technology.
Everything’s changed in recent years, driven by two trends. The first is the rising complexity of any hardware design. The second is the escalating amount of embedded software, including drivers, operating systems, diagnostics, and applications. Virtually any design in any segment of the semiconductor industry, whether graphics, processor, storage, networking, multimedia, or automotive, is part of this scenario.
The legendary register transfer level (RTL) simulator can be used for hardware debug at the block level only — it is barely useful for early testing of a full design, even in the absence of software. As soon as software is loaded into memory, a software simulator runs out of steam. Prototyping, whether virtual, physical, or hybrid, cannot easily trace bugs in hardware and may not cope with design sizes in the hundreds of millions of gates.
The alternative is hardware emulation. A modern hardware emulator can quickly trace hardware bugs, whether detected by hardware misbehavior or by software failures. As well, it can detect software bugs, whether pinpointed by software breakdowns or by hardware misconduct. No other verification tool has the power, flexibility, and versatility to complete such a daunting task.
Let’s consider Mentor Graphics, one of the three suppliers of hardware emulation, as illustration of the emulation phenomenon. Comments from financial analysts following Mentor’s first quarter 2014 earnings report were effusive:
- “Red hot emulation. We attribute much of the strength (95% year-over-year growth) to emulation, which is being driven through share gains and new customer wins in both traditional semiconductor companies and system houses.” (D.A. Davidson)
- “MENT still gaining traction in emulation — The ongoing secular trend of increased emulation adoption continues due to reducing time to market at the sub-2Xnm nodes. Also some customers are beginning to use emulators for bringing up the software.” (Bank of America)
- “Since the release of the new platform two years back, Mentor has been executing very well in emulation. The $7 million upside in the quarter was related to the emulation business. The company commented that major IP providers, ARM and Imagination, have standardized on Mentor’s emulation tool.” (Pacific Securities)
- “Mentor remains well positioned in a number of important categories (including apparent revenue leadership now in emulation).” (Griffin Securities)
- “Mentor enjoyed strength in its emulation product line from a combination of recent product enhancements and the competitive landscape being in its favor.” (JP Morgan)
- “We reiterate our BUY rating as emulation, transportation and core EDA continue to drive healthy growth for MENT and offer potential for upside to our estimates.” (Canaccord/Genuity)
- “MENT’s emulation business growth is certainly worth emulating! The trend towards emulation is a secular tailwind for MENT as chips are only going to get more complex and more in need of system level design.” (Summit research)
And, these glowing comments are only about Mentor Graphics!
“Red Hot” indeed, but don’t take my word for it. The Design Automation Conference (DAC) next week at the Moscone Center in San Francisco will be a prime venue to learn more about the varied uses of hardware emulation from vendors Cadence, Mentor, and Synopsys.
About Lauro Rizzatti:
Lauro Rizzatti is a verification consultant. He was formerly general manager of EVE-USA and its vice president of marketing before Synopsys’ acquisition of EVE. Previously, he held positions in management, product marketing, technical marketing, and engineering. He can be reached at lauro@rizzatti.com.