Jean-Marie Brunet, Vice President and General Manager of the Siemens Hardware-Assisted Verification business unit finds himself and his group in a unique situation when it comes to the topic of chiplets.

Designing a 5G system brings new challenges. Unlike all four previous standards, the 5G standard addresses multiple requirements coming from growth in mobile users, IoT proliferation, and autonomous driving vehicle development.

Vsora has just raised $4.2 million in a pre-Series B round of financing to accelerate the development of its Tyr chip family.

Bill Neifert invited me to join him on Zoom recently to talk about his move to Corellium, a company known within the DevSecOps (development, security, operations) market.

Editor’s Note: Jean-Marie Brunet, Vice President and General Manager of hardware-assisted verification at Siemens, recently addressed the rapid growth of a specialized area in the chip design and verification space called hardware-assisted verification.

Lauro Rizzatti offers Semiwiki readers a two-part series on why three kinds of hardware-assisted verification engines are now a must have for semiconductor designs continues today. His interview below with Juergen Jaeger, Prototyping Product Strategy Director in the Scalable Verification Solution division at Siemens EDA, addresses why different hardware platforms should be used in a … Read more

The September 2022 edition of EE Times Europe Magazine discusses innovations in automotive connectivity, electrification, and autonomous driving. It also analyzes trends and developments in neuromorphic, quantum, and photonics industries. Welcome to the September 2022 Edition of EE Times Europe Magazine! Two megatrends, autonomy and electrification, are revamping corporate strategies and changing the face of … Read more

Hardware-assisted verification (HAV) solutions are the must-have verification tools today as complexity, functionality, and performance requirements grow. They are also mandatory to ensure that design power consumption meets the power budget allocated. This need was obvious at the 2022 Design Automation Conference (DAC), as chip design verification engineers relayed tales of challenges solved by employing … Read more

In a two-part series, Lauro Rizzatti examines why three kinds of hardware-assisted verification engines are a must have for today’s semiconductor designs. To do so, he interviewed Siemens EDA’s Vijay Chobisa and Juergen Jaeger to learn more about the Veloce hardware-assisted verification systems. What follows is part one, a condensed version of his discussion with … Read more

The automotive industry is delivering the first implementations of advanced driver-assistance systems (ADAS) for Level 2 (foot off the gas or break) and Level 3 (hands off the wheel) vehicles. Though it’s struggling to develop an autonomous driving (AD) system from L4 (eyes off the road) to L5 (completely self-driving and autonomous) vehicles. The challenge … Read more