Source: EEWEB By Lauro Rizzatti (Contributed Content) | Monday, August 20, 2018 Challenges facing chip design verification engineers are plentiful, but the opportunities, especially for AI applications, are abundant It’s an exciting time for anyone in the chip and electronic design automation (EDA) industry, asserts Dr. Raik Brinkmann, president and CEO of formal verification provider OneSpin. Dr. … Read more
Source: VanillaPlus Posted by: Marek Maroszek Siemens is buying Finland-based Sarokal. In this interview for VanillaPlus, Jean-Marie Brunet, senior director of Marketing at Mentor, a Siemens business tells Lauro Rizzatti, hardware emulation expert, at Rizzatti, LLC outlines the strategy behind the purchase. (Sponsored Feature) Lauro: Jean-Marie, recently Mentor announced the acquisition of Sarokal, a small company that specialises in 5G testers. Can you … Read more
Based on what attendees saw at DAC, the forecast for EDA could be cloud-based and changeable with heavy cloud cover but little rain and loads of potential. Source: EEWEB By Lauro Rizzatti (Contributed Content) | Friday, July 27, 2018 Design Automation Conference (DAC) attendees, expecting heavy fog to shroud the Moscone Center in San Francisco last … Read more
Source: ChipDesign By Lauro Rizzatti June 26, 2018 In general, the cost-of-ownership (COO) of a piece of equipment encompasses the purchase price plus several additional expenses that users incur during the lifetime of the equipment –– anywhere from three to five years –– to keep it operational, usable, safe and in good condition. Some of these … Read more
Source: EEWeb By: Max Maxfield As you may recall, a couple of months ago my chum — verification expert Lauro Rizzatti — asked me if I’d be interested in joining him on a podcast. Since Lauro knows that I’m currently very interested in advanced technologies, including artificial intelligence (AI), artificial neural networks (ANNs), machine learning, deep … Read more
Source: ElectronicDesignhttp://www.electronicdesign.com/test-measurement/not-all-emulators-are-created-equal By Lauro Rizzatti, Jean-Marie Brunet Posted June 13, 2018 Speed, throughput, and latency are the key parameters in determining hardware-emulation performance. For a verification technology that wasn’t well known outside of the largest semiconductor designs until a decade ago, hardware-emulation adoption has grown considerably over the past few years. Semiconductor companies from Silicon Valley … Read more
Source: EEWeb By Lauro Rizzatti June 13, 2018 Now, no obstacles stand in the way for any potential users to benefit from the power of emulation and meet their tape-out deadlines. I was let in on a soon-to-be-announced breakthrough on the verification front that I can’t keep to myself. I’m about to share it, but first… … Read more
Source: Mentor Blog By Jean-Marie Brunet Posted May 23, 2018 On May 15, Mentor, a Siemens Business, held its annual Silicon Valley User2User (U2U) conference at the Santa Clara Marriott. Two keynotes by Dr. Wally Rhines, president and CEO of Mentor and Hooman Moshar, vice-president of engineering at Broadcom, opened the event. The keynote from Dr. Wally … Read more
Source: EEWeb By Lauro Rizzatti | Posted: May 15, 2018 As one panelist stated: “Shift left? Yes, we are doing it. Yes, it’s been incredibly effective. Yes, it’s been incredibly painful.” A prominent theme at DVCon in February was the broad adoption of the “shift-left” methodology to accelerate embedded software development. (Note: In this context, the … Read more
Source: TechDesignForum By Lauro Rizzatti | Posted: May 4, 2018 Artificial intelligence (AI) and its two main offshoots, machine learning (ML) and deep learning (DL), are hot topics right now. But in actual fact. It can be traced back to a conference in 1956 at Dartmouth College. At the time, researchers considered designing systems that resembled … Read more