Case study: Verifying and optimizing software for power on SoCs

How emulation was used to debug out-of-spec power on a multicore ARM design using the AXI bus. Source: TDF Modern system-on-chip (SoC) designs include a vast amount of embedded software that makes them each unique, presenting challenges for failure analysis and debug. Through a stacked structure – made up of drivers, operating systems and applications … Read more

Why Hardware Emulation’s OS is Like a Computer System

Mentor’s Charley Selvidge has been thinking that the operating system of a hardware emulator is a natural evolution of the way software systems are built for emulators Source: EE Times Charley Selvidge, chief engineering manager at Mentor, a Siemens Business, has an unassuming and modest demeanor that belies a sharp intellect and professorial ability to explain … Read more

DAC Panelists Discuss Emulation’s Versatility & Various Use Models

Lauro Rizzatti, Nasr Ullah (Samsung), Bruce Cheng (Starblaze), and Robert Kaye (ARM) discuss emulation for data storage chips, system IP, and embedded software Source: EE Times By Wednesday afternoon, the 54th Design Automation Conference program was starting to wind down and attendees were scattering for parts unknown. It was a different scene at the Mentor booth … Read more

Develop Software Earlier: Panelists Debate How to Accelerate Embedded Software Development

A lively and open discussion explored tools and methodologies to accelerate embedded software development Source:  Design News What follows is an excerpt from our lively and open discussion on tools and methodologies to accelerate embedded software development. Lauro:  What are the technologies to develop software and what are the most effective ways to use them to … Read more

Hardware emulation gets smarter with save-and-restore for debug

Techniques previously unavailable during ICE or testbench acceleration can now greatly speed emulation debug in those modes Source:  Tech Design Forum Hardware emulation has come a long way recently but there remains room for improvement. Its use for debug is a good example. Debug rests on the ability to track the activity or waveforms of all … Read more

Data Storage: The Solid State Drive (SSD)

In this column, we review the state-of-the-art in solid state drives (SSDs) and propose a methodology for the verification and validation of the SSD controller Source: EE Times Note: This is the third in a series of articles on digital data storage. In Part 1, Digital Data Storage is Undergoing Mind-Boggling Growth, we considered the evolution of digital … Read more

Hardware emulation: Tool of choice for verification and validation

Source: Embedded Computing Design Design in any discipline – electronics, mechanical, aerospace, etc. – begins with a specification that captures what the end product should do and essentially drives the entire development cycle. In the early stages of development, the first task uses the specification to verify the design under development works correctly and is error-free. … Read more

Hardware Emulation for Software Validation (Part 2): Hybrid Emulation and Trace-Based Debug

Advances in running and debugging software are making the emulation platform a viable and cost-effective way to begin software-development tasks earlier Source: Electronic Design Editor’s Note: Lauro Rizzatti went to Russell Klein, director of engineering at Mentor Graphicsand a hardware emulation expert, to learn more about hybrid emulation. This column is co-authored by the two of them. Hardware … Read more

Hardware-assisted verification, from its dawn to SystemVerilog, UVM, and transactors

Source: EDN My [LR’s] first exposure to hardware emulation happened circa 1995 upon visiting a major processor firm in Austin, Texas. Its lab was jam-packed from floor to ceiling with monstrous hardware emulators of different generations from Quickturn, the leader at the time. What shocked me was the sight of a huge and messy bundle of … Read more

DVCon US: Machine Learning Lands in EDA

Source: EDACafe Each DVCon event tends to have a common thread throughout the keynote presentations, panels, sponsored lunches, tutorial and technical sessions. I would pick “machine learning” as the new EDA frontier for DVCon US 2017, held in San Jose, Calif., at the DoubleTree Hotel February 27-March 2. In the keynote and panels machine learning was … Read more